/*************************************************
* CHIPSEA F61 AFE HAL
* Copyright(c) 2018, NewDegreeTechnology, Inc.
**************************************************/

#include "hal_ndt_common.h"

#ifdef AW_86802

#ifndef __HAL_AW_86802_AFE_H
#define __HAL_AW_86802_AFE_H

#include <stdint.h>


#define AW_AFE_PGA2_GAIN (GAIN_PGA2_8) // (GAIN_PGA2_4)
#define AW_AFE_PGA1_GAIN (GAIN_PGA1_64)

#define TEMP_BIT (1)
#define AFE_MAX (1000)
#define AFE_MIN (-1000)
#define AFE_ADJUST_MAX ((AW_S16)0x7FFF)
#define AFE_ADJUST_MIN ((AW_S16)0x8000)
#define AFE_SYM ((AW_U16)0X2000 >> 2)
#define AFE_SYM_U ((AW_U16)0x1FFF >> 2)
#define AFE_CH_FLG (0x01U)
#define AFE_ADMCR_CLR (0x01U) // only open adc
#define AFE_ADMCR_CYCLE_1 (0x004B0809) //
#define AFE_ADJUST_DAC_EN (0x3900U) // enable digital DAC
#define AFE_ADJUST_DAC_DIS (0x1900U)
#define AFE_AD_OS_EN (0x10000) // AD offset calibration residual
#define AFE_AD_OS_DIS (~AFE_AD_OS_EN)
#define AFE_RED_OS_EN (0x00008000) // elimination of residuals
#define AFE_RED_OS_DIS (~AFE_RED_OS_EN)
#define AFE_AD_OS_CLEN (0xFFF)

#define AW_MAG (1000) // AFE data Magnification
#define AW_RTC_RES (9700 * AW_MAG)
#define AW_VS (2.80 * AW_MAG)
#define AW_ADD_VREF (3.26 * AW_MAG) // 2.45v 2.6
#define HALF_VS_CODE (8192)
#define VPS_RES_MAX (10800)
#define VPS_RES_MIN (5400)
#define VP0_RES_MAX (10800)
#define VP0_RES_MIN (5400)
#define VNS_RES_MAX (10800)
#define VNS_RES_MIN (5400)
#define VN0_RES_MAX (10800)
#define VN0_RES_MIN (5400)


#define VS_ADJ_28 (0x01) // 0x03  3.1v  0x01 vs = 2.8v  0x00 = 2.4v
#define VS_ADJ_24 (0x00)

//////////////////////////////////////////////////////////////////////////////

extern void HAL_AFE_Init(void);

/////////////////////////////////////////////////////////////////////////////

#endif	/* __HAL_CS_F61_AFE_H */

#endif /* End of CS_F61 */
